Electronic circuits frequently exchange data between multiple clock domains. An example electronic switch transfers digital telecommunications between a T1 interface transferring data at a rate of 1.544 megabits per second and an E1 interface transferring data at a rate of 2.048 megabits per second. The example electronic switch reformats the data exchanged between the T1 and E1 interfaces, including changing the rate of data transfer.
While an electronic circuit can have asynchronous clock domains that exchange data using complex synchronizer circuits, a simpler electronic circuit frequently results from using synchronous clock domains that directly exchange data. For the example electronic switch, the T1 and E1 interfaces can operate synchronously using a 2.048 MHz clock for the E1 interface that is a synchronous ratio of 256/193 times a 1.544 MHz clock for the T1 interface. Generally, two synchronous clock domains have respective clocks related by a ratio of integers.
A phase-locked loop, for example, can synthesize an output clock with a frequency that is a ratio of a numerator integer over a denominator integer times the frequency of an input clock. The phase-locked loop compares the phase of the input clock divided by the denominator integer with the phase of the output clock divided by the numerator integer. Thus, the phase-locked loop compares the phase of the input and output clocks at only a fraction of the transitions of the input clock; the fraction is one divided by the denominator integer. When the denominator integer is large, the phase-locked loop ignores the phase information available at most transitions of the input clock.
A clock domain in a hypothetical application requires a clock that meets certain specifications, such as a limit on the jitter of the clock. The clock for the clock domain can have excessive jitter when a phase-locked loop generates the clock by ignoring the phase information at most transitions of an input clock.
The present invention may address one or more of the above issues.